1. Field of the Invention
The present invention relates to the field of semiconductor devices, and more particularly to multiple lead plastic flat packs for integrated circuits and the like.
2. Prior Art
In recent years integrated circuits of increasing complexity have become commercially available in large quantities, with the cost of such circuits in the unpackaged chip form becoming lower and lower. While advances in technology have contributed to the increase in complexity and the decrease in cost of such devices, the cost is also affected by the fact that many such integrated circuits are fabricated simultaneously on a single semiconductor wafer, and may be tested on the wafer prior to the dicing of the wafer into individual integrated circuits. Thus, a single series of processing steps on a single semiconductor wafer results in the production of many integrated circuits simultaneously. Testing of the circuit prior to dicing generally allows the testing of many devices by a single asignment of the semiconductor wafer.
Packaging of semiconductor devices involves the handling and processing of individual integrated circuits after dicing. Thus, each circuit must be handled individually, each must be accurately located with respect to the package, each of the required contacts or connections between the chip and the package leads must be made, and the package must be satisfactorily sealed against moisture and other contaminants. Accordingly, it is not unusual for the cost of such packages to be on the order of the cost of the semiconductor device to be packaged therein, and in many cases it is even greater than the device to be packaged.
Because of the great emphasis and importance of cost of such packages, packages of the type commonly referred to as plastic flat packs have come into widespread use, particularly in commercial applications. Such packages are characterized by a generally rectangular, relatively thin plastic body with a plurality of leads projecting out of each side and then bent downward so that the device may be either plugged into a cooperatively disposed socket for such a device, or soldered directly to a printed circuit board adapted to receive the device. The plastic packages of the prior art generally dispose the top surface of the semiconductor chip below the plane of the top surface of the spider conductors, so that both the semiconductor surface and the lead frame surface cannot be maintained in focus under a microscope at the same time, and coupling wires are longer than necessary. In addition, fabrication and assembly are more difficult and time consuming than necessary, so that improvements in such packages and packaging techniques may be of substantial advantage to the end product cost and the packaged integrated circuit device reliability. Such an improvement should tend to eliminate one major cause of reliability problems which is due to epoxy materials coming in contact with the semiconductor (hot intermittent open).